2nd Order CIFF Dither Chaotic Sigma Delta Modulator

by allenlu2007

 

續前文 CIFB dither chaotic sigma delta modulator (DCSDM) 的一個問題是 dynamic range 收縮。DC input 在 0.875 時 (actually 0.8) 就 explode.  一個 potential 的解法是 integrator saturation, 在大信號輸入時,在 cascaded integrator (CI) 的最後一個 integrator 開始 saturation, 因些 2nd order 變成 1st order. (甚至在更大 input signal 時,變成 0th order).  

這在 CIFB 架構中,應該是不可能 (?)。因為最後一個 integrator 總匯所有 integrators 的 information (i.e. 所有 state information).  如果 saturate 就 loss 所有 state information!

但在 CIFF 架構中,所有 state information 是分開 sum 在最後的加法器。高階 integrator saturate 雖然損失一些 state information, 但仍有低階 integrator 繼續工作,同時防止系統 blow up.  以上是 2nd order CIFF general form (with signal feedthrough).   STF=1  NTF = (1-aD)(1-bD).

另外由於 signal feedback through to output, 在 feedback path 的 cascaded integrators 看到的是 quantization error.  因些也稱為 (low-distortion architecture!)

注意 low-distortion architecture 並非 CIFF 專利,CIFB or EF (error feedback) 架構也可達到。

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In general, we can have:

CIFB with low distortion signal feedthrough (Mealy machine)

CIFB without signal feedthrough (Moore machine)

CIFF with low distortion signal feedthrough (Mealy machine)

CIFF without signal feedthrough (Moore machine)

EF (error feedback) with low distortion

 

Simulink file: /Users/alu/work/matlab/simulink/sdm/sdm_ciff_ft_v2.slx

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Dither Chaotic SDM:  aa=+0.05, b=1, K=1-DC with uniform random noise (saturation level = +/-4)

DC=0

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DC=0.125

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DC=0.25

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DC=0.5

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DC=0.75

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DC=0.875

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DC=0.9

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最大的好處是 dynamic range 非常大,可以到 0.9 仍然 working!!! 

0.95 explode!

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再來 check CIFF + saturation but without feedthrough

Simulink file: /Users/alu/work/matlab/simulink/sdm/sdm_ciff_ft_v3.slx

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DC=0 is the same as previous case.

DC=0.125

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DC=0.25

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DC=0.5

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DC=0.75

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DC=0.875

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DC=0.9

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這是因為 CIFF 架構+ saturation 的關係或是 low distortion 的關係?

Check CIFB + feedthrough to see if it works? 結論是 CIFB+feedthrough (加或不加 saturation 都不影響) 都會有 dynamic range reduction 的問題 (0.75 only).

為了確認 low distortion 是否有影響,再做一個 CIFB with feedthrough (low distortion) 架構如下。

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Simulink file: /Users/alu/work/matlab/simulink/sdm/sdm_cifb_ft_v1.slx

注意我放了 saturation (+/-4) 在 integrator 2 output.

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DC=0, aa=0.05

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DC=0.125

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DC=0.25

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DC=0.5

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DC=0.75

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DC=0.875 –> explode!

In summary

CIFF + saturation + low distortion feedthrough ==> wide dynamic range

CIFF + saturation – feedthrough ==>  wide dynamic range

CIFB + saturation + low distortion feedthrough ==> dynamic range reduction

CIFB + saturation – feedthrough ==> dynamic range reduction

結論:  CIFF + saturation ==> wide dynamic range

 

 

PS:

Direct signal feedthrough 雖有 low distortion 的優點,但 zero latency 在 analog circuit 時會有 implementation 的困難。 EF 架構同樣也有 matching 的要求,也是有 analog circuit implementation 的困難。

Adjust threshold to modulate the spurs:  I tried and it does not seem to work by biasing the threshold of the comparator.  The spur position is unchanged.

How to sum two SDM one-bit stream into another one-bit stream?

low pass + low pass –> another LPF sdm (not working?)

bandpass + bandpass –> another LPF sdm (or bandpass sdm) (??)

 

 

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